Work Experience

Worked as a Lecturer in JITS (affiliated to JNTU) for one academic (2002 to 2003) year. I taught �Switching Theory & Logic Design� (Digital Electronics) and �Data and Computer Communications� to E & C Engineering students.

Projects

ASIC based Projects

Title                             Multi-Standard PLL for Wireless Applications

Organisation                For UCB, Berkeley, USA

Environment                Cadence Analog and Mixed Signal Design

Platform                      Sun Solaris

Team Size                   2.

Role                            Design of Divider,PFD and loop issues.

Description                 

A Digital Phase Locked Loop for GSM 900, DCS 1800, WCDMA and Bluetooth Receivers has been designed at circuit level and successfully simulated using Cadence Analog and Mixed Signal Design Environment, spectre RF.